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Deep Learning on FPGAs

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dc.contributor.advisor Taylor, Graham W.
dc.contributor.advisor Areibi, Shawki
dc.contributor.author Lacey, Griffin James
dc.date.accessioned 2016-08-25T14:10:42Z
dc.date.available 2016-08-25T14:10:42Z
dc.date.copyright 2016-08
dc.date.created 2016-08-16
dc.date.issued 2016-08-25
dc.identifier.uri http://hdl.handle.net/10214/9887
dc.description.abstract The recent successes of deep learning are largely attributed to the advancement of hardware acceleration technologies, which can accommodate the incredible growth of data sizes and model complexity. The current solution involves using clusters of graphics processing units (GPU) to achieve performance beyond that of general purpose processors (GPP), but the use of field programmable gate arrays (FPGA) is gaining popularity as an alternative due to their low power consumption and flexible architecture. However, there is a lack of infrastructure available for deep learning on FPGAs compared to what is available for GPPs and GPUs, and the practical challenges of developing such infrastructure are often ignored in contemporary work. Through the development of a software framework which extends the popular Caffe framework, this thesis demonstrates the viability of FPGAs as an acceleration platform for deep learning, and addresses many of the associated technical and practical challenges. en_US
dc.description.sponsorship Ontario Graduate Scholarship (OGS), NSERC Canada Graduate Scholarship-Master’s Program. en_US
dc.language.iso en en_US
dc.subject Deep Learning en_US
dc.subject FPGA en_US
dc.subject Machine Learning en_US
dc.subject Hardware Acceleration en_US
dc.title Deep Learning on FPGAs en_US
dc.type Thesis en_US
dc.degree.programme Engineering en_US
dc.degree.name Master of Applied Science en_US
dc.degree.department School of Engineering en_US
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