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PMOS-based Integrated Charge Pumps with Extended Voltage Range in Standard CMOS Technology

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dc.contributor.advisor Gregori, Stefano
dc.contributor.author Liu, Jingqi
dc.date.accessioned 2012-08-13T19:44:05Z
dc.date.available 2012-08-13T19:44:05Z
dc.date.copyright 2012-07
dc.date.created 2012-07-26
dc.date.issued 2012-08-13
dc.identifier.uri http://hdl.handle.net/10214/3846
dc.description.abstract This thesis presents the design and implementation of PMOS-based integrated charge pumps with extended voltage range and their regulation circuits in a standard process. The performance of charge pumps are evaluated by their output resistances and power conversion efficiencies. Formulas which describe the charge pump characteristics are developed and presented. Existing charge pumps are analyzed and studied to understand their limitations in generating high voltages and achieving high performance. The proposed charge pump structures are designed to use PMOS switches to alleviate the high voltage stresses across transistors by biasing their bulk independently. The voltages across transistors and capacitors are kept within the suggested voltage rating (VDD)regardless of how high the output voltage is, thus the maximum voltage range is extended and no longer limited by the breakdown voltages of the devices. The charge pump circuits only need low-voltage devices and standard processes, and can be easily integrated in a digital or mixed-signal design. The proposed charge pump regulation circuits include a voltage divider, a voltage controlled ring oscillator and a feedback operational amplifier. The regulation circuits are able to adjust the clock frequency to regulate the charge pump to a steady output voltage (set by the reference voltage) under a large range of current loads. A test chip including the proposed charge pumps and regulation circuits was fabricated in a 0.18 um digital CMOS process provided by Taiwan Semiconductor Manufacturing Company (TSMC). The proposed charge pumps were tested and demonstrated the reliable generation of output voltages up to 11.47 V using only low-voltage devices. The simulation and measurement results have been presented and compared, demonstrating the functionality and performance of the proposed circuits. en_US
dc.description.sponsorship Kapik Integration, Mitacs en_US
dc.language.iso en en_US
dc.subject Charge Pump en_US
dc.subject breakdown voltage en_US
dc.subject PMOS en_US
dc.subject regulation en_US
dc.title PMOS-based Integrated Charge Pumps with Extended Voltage Range in Standard CMOS Technology en_US
dc.type Thesis en_US
dc.degree.programme Engineering en_US
dc.degree.name Master of Applied Science en_US
dc.degree.department School of Engineering en_US
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