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Mixed-Signal Physically Unclonable Function with CMOS Capacitive Cells

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Title: Mixed-Signal Physically Unclonable Function with CMOS Capacitive Cells
Author: Y. Kamal, Kamal
Program: Engineering
Advisor: Muresan, Radu
Abstract: An electronic physically unclonable function usually includes an on-chip error-correcting code unit, which is vulnerable to security attacks and adds area, power, and data processing time overheads. This dissertation proposes two mixed-signal physically unclonable function circuits for authentication purposes. The first is called the capacitive physically unclonable function (C-PUF), which applies an expanding challenge-response pair approach; it processes a 21-bit challenge to generate a 128-bit response word. The second design is called the enhanced capacitive physically unclonable function (EC-PUF), which processes a 64-bit challenge word to generate also a 128-bit response word. The later design uses short-wide metal-oxide-semiconductor field-effect transistors within its capacitive cells, to allow for more intrinsic variations throughout the fabrication process, which improves the uniqueness of the response chunks at the cost of compatibility. Both designs divide the input challenge word over multiple computational groups to decrease processing time, increase security, and eliminate the need for error-correcting code units. Both the C-PUF and the EC-PUF designs were simulated using 45 nm complementary metal-oxide-semiconductor technology. The average power was 1.05 mW and 921.67 μW, the layout area was 3276 μm2 and 22,470 μm2, and the average data processing time was 30 μs and 118 μs, respectively.
URI: http://hdl.handle.net/10214/17525
Date: 2019-10
Rights: Attribution-NonCommercial-NoDerivatives 4.0 International
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Attribution-NonCommercial-NoDerivatives 4.0 International Except where otherwise noted, this item's license is described as Attribution-NonCommercial-NoDerivatives 4.0 International