Towards Smart FPGA Placement Using Machine Learning

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Al-Hyari, Abeer
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University of Guelph

Recently, the application of machine learning to problems in the area of Electronic Design Automation (EDA) has received increased attention due to ease of integration into EDA tools, computational efficiency, and ability to generalize, which leads to significant improvements in solution quality compared to traditional solution methods. In this thesis, we propose five novel machine learning frameworks to solve problems in the Field Programmable Gate Array (FPGA) placement flow. The five frameworks include: MLCong, DLCong, MLRoute, DLRoute, and MLSelect. As FPGAs push through integration levels of 30 (or more) billion transistors, avoiding congestion for routing resources has become one of the most important placement objectives. We first propose a machine learning model, called MLCong, for accurately estimating congestion during FPGA placement. This model achieves an 85% prediction accuracy, while running, on average, 291x faster than a global router. We further improve congestion estimation by presenting a novel, Deep Learning Congestion (DLCong) model for accurately estimating routing congestion during FPGA placement. DLCong uses a Convolutional Encoder-Decoder architecture with skip connections to estimate routing congestion. DLCong achieves 94% prediction accuracy, while exhibiting runtimes of less than a second. The ability to accurately and efficiently estimate the routability of a circuit based on its placement is one of the most challenging tasks in the FPGA flow. A deep learning framework based on a convolutional neural network model for predicting the routability of a placement is also proposed in this thesis. Experimental results show that the proposed framework achieves a routability prediction accuracy of 97%, while exhibiting runtimes of only a few milliseconds. Finally, a machine learning framework (MLSelect) that is capable of recommending the most appropriate placement flow, from among a set of alternate flows. Results obtained indicate that the machine learning framework is capable of selecting the most effective flow based on the routed wirelength with an 83% accuracy.

FPGA, Placement, CAD Flow, Machine learning, deep learning, electronic design automation